This invention relates generally to semiconductor memories.
Phase change memory devices use phase change materials, i.e., materials that may be electrically switched between a generally amorphous and a generally crystalline state, as an electronic memory. One type of memory element utilizes a phase change material that may be, in one application, electrically switched between generally amorphous and generally crystalline local orders or between different detectable states of local order across the entire spectrum between completely amorphous and completely crystalline states.
Typical materials suitable for such an application include various chalcogenide elements. The state of the phase change materials is also non-volatile. When the memory is set in either a crystalline, semi-crystalline, amorphous, or semi-amorphous state representing a resistance value, that state is retained until reprogrammed, even if power is removed. This is because the programmed resistance represents a phase or physical state of the material (e.g., crystalline or amorphous).
Conventionally, phase change memories are read without triggering the memory element. Triggering occurs when the threshold current (at threshold voltage) of the memory element is exceeded. As a result, the read current may be limited to avoid triggering. But limiting the read current to less than the threshold current reduces performance. Use of a higher current but limiting the voltage applied to less than the threshold voltage is sensitive to variation in threshold voltage and the voltage clamp which may reduce margin and inadvertently trigger the memory element, possibly causing the cell to change (read disturb) or be misread (non-repeating “soft error”).
Thus, it would be desirable to improve the margin of reading phase change memories.